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Events
Circuit Simulation-Driven Analog/RF System-in-Package Webinar Series
8th April 2008 - 9:00 AM Pacific
Today's wireless devices manufactures are constantly challenged to pack more functionality into less space in ever-shrinking market windows. To address this demand, analog/RF system-in-package (SiP) modules are becoming one of the fastest growing integration fabrics in the wireless silicon market. However, when designing these complex RF SiP modules, designers are facing challenges that conventional methodologies and technologies just cannot overcome.
In this webinar series, Cadence will take you through these common challenges—presenting a new methodology and integrated technologies that address your key pain points. The webinars will include detailed demonstrations using the latest Cadence SiP RF methodology and technologies that seamlessly integrate with the Cadence® Virtuoso® custom design platform. By attending these webinars, you will learn how driving an RF SiP module implementation from a single top-level schematic (that includes RF/analog die, embedded RF discretes, post-layout parasitic extraction, constraint-driven interconnect, and full SiP tapeout manufacturing preparation) enables full pre- and post-route circuit simulation of the entire SiP.
Learn more 
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